1. Field of the Invention
The invention relates to a semiconductor structure and semiconductor pattern structure, and more particularly, to a semiconductor structure and semiconductor pattern structure integrated with dummy structures.
2. Description of the Prior Art
The semiconductor integrated circuit (hereinafter abbreviated as IC) industry has experienced rapid growth, and the ICs become more complex and smaller than the previous generation. In the course of IC evolution, functional density has generally increased while geometry size has decreased.
This scaling down process generally provides benefits by increasing production efficiency and lowering process costs. However, it has also increased the complexity of processing/manufacturing for integrating devices of different kinds on one single die. Moreover, since the devices of different kinds are to be formed on one single die, it is found that processes for manufacturing different devices are often mutually influenced and devices are adversely impacted. Eventually, electrical performance of the whole IC is deteriorated.
Therefore, a semiconductor structure and a semiconductor pattern structure that are able to protect devices from being influenced in the complicated manufacturing processes and to ensure or improve IC performance are still in need.